Lines Matching refs:and

1 * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
4 R8A73A4 and R8A7740 it also acts as a GPIO controller.
22   - reg: Base address and length of each memory resource used by the pin
31     IRQ pins. This property is mandatory when the PFC handles GPIOs and
37 configuration node" and for the common pinctrl bindings used by client devices.
41 function to select on those pin(s) and pin configuration parameters (such as
42 pull-up and pull-down).
45 or grouped in child subnodes. Both pin muxing and configuration parameters can
46 be grouped in that way and referenced as a single pin configuration node by
50 pins or pin groups properties) and contain at least a function or one
54 All pin configuration nodes and subnodes names are ignored. All of those nodes
55 are parsed through phandles and processed purely based on their content.
66   Valid values for pin, group and function names can be found in the group and
72 bias-disable, bias-pull-up and bias-pull-down.
78 On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
84   - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
86     GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
133 Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
134            for the MMCIF and SCIFA4 devices