Lines Matching refs:pin
1 One-register-per-pin type device tree based pinctrl driver
18 pin functions is ignored
21 more than one pin, for which "pinctrl-single,function-mask" property specifies
22 position mask of pin.
67 low power mode of this pin. For some silicons, the low power mode will
68 control the output of the pin when the pad including the pin enter low
74 range. They're value of subnode phandle, pin base in pinctrl device, pin
79 /* pin base, nr pins & gpio function */
89 This driver assumes that there is only one register for each pin (unless the
93 The pin configuration nodes for pinctrl-single are specified as pinctrl
96 a pin for a device could be done with:
105 In case when one register changes more than one pin's mux the
232 0x00 0x18 0x18 /* FSR/CLKR signal from FSX/CLKX pin */
238 0x00 0x40 0x40 /* McBSP2 CLKS from McBSP_CLKS pin */