Lines Matching refs:pin
53 gpio-specifier may encode: bank, pin position inside the bank,
54 whether pin is open-drain and whether pin is logically inverted.
66 GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
80 opposite physical level than the signal at the device's pin.
165 2.1) gpio- and pin-controller interaction
169 on the package via a pin controller. This allows muxing those pins between
172 It is useful to represent which GPIOs correspond to which pins on which pin
181 pinctrl-phandle : phandle to pin controller node
183 pinctrl-base : Base pinctrl pin ID in the pin controller
186 The "pin controller node" mentioned above must conform to the bindings
194 the respective pin controller.
198 ranges contain the name of a pin group defined in the respective pin
200 that pin group.
202 Previous versions of this binding required all pin controller nodes that
219 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
220 pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's
240 Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO
241 ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2