Lines Matching refs:controller
12 gpio-phandle : phandle to gpio controller node
14 (controller specific)
34 gpio-controller
38 gpio-controller
49 Note that gpio-specifier length is controller dependent. In the
55 Exact meaning of each specifier cell is controller specific, and must
66 GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
76 GPIO controller that achieves (or represents, for inputs) a logically asserted
79 the GPIO controller and the device, then the gpio-specifier will represent the
106 (at the GPIO controller) assuming that the device is configured for this
110 controller.
112 2) gpio-controller nodes
115 Every GPIO controller node must contain both an empty "gpio-controller"
121 gpio-controller's driver probe function.
123 Each GPIO hog definition is represented as a child node of the GPIO controller.
127 number of cells specified in its parent node (GPIO controller
142 Example of two SOC GPIO banks defined as gpio-controller nodes:
144 qe_pio_a: gpio-controller@1400 {
147 gpio-controller;
158 qe_pio_e: gpio-controller@1460 {
161 gpio-controller;
165 2.1) gpio- and pin-controller interaction
168 Some or all of the GPIOs provided by a GPIO controller may be routed to pins
169 on the package via a pin controller. This allows muxing those pins between
181 pinctrl-phandle : phandle to pin controller node
182 gpio-base : Base GPIO ID in the GPIO controller
183 pinctrl-base : Base pinctrl pin ID in the pin controller
186 The "pin controller node" mentioned above must conform to the bindings
194 the respective pin controller.
199 controller. The number of pins/GPIOs in the range is the number of pins in
202 Previous versions of this binding required all pin controller nodes that
211 qe_pio_e: gpio-controller@1460 {
215 gpio-controller;
219 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
220 pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's
225 gpio_pio_i: gpio-controller@14B0 {
229 gpio-controller;