Lines Matching refs:system
9 In an ARM system, the hierarchy of CPUs is defined through three entities that
10 are used to describe the layout of physical CPUs in the system:
22 For instance in a system where CPUs support SMT, "cpu" nodes represent all
23 threads existing in the system and map to the hierarchy level "thread" above.
25 in the system and map to the hierarchy level "core" above.
28 corresponding to the system hierarchy; syntactically they are defined as device
79 be defined within the cpu-map node and every core/thread in the system
105 per cluster. A system can contain several layers of
122 the cluster. If the system does not support SMT, core
148 in the core if the system supports SMT. Thread nodes are
167 Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters):
386 Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT):