Lines Matching refs:that

4 This document describes the semantics of the DMA attributes that are
20 useful, suppose that a device does a DMA write to indicate that data is
28 DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
29 may be weakly ordered, that is that reads and writes may pass each other.
32 those that do not will simply ignore the attribute and exhibit default
38 DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
42 those that do not will simply ignore the attribute and exhibit default
50 you are guaranteeing to the platform that you have all the correct and
62 that you won't dereference the pointer returned by dma_alloc_attr(). You
63 can treat it as a cookie that must be passed to dma_mmap_attrs() and
64 dma_free_attrs(). Make sure that both of these also get this attribute
68 DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the
82 (usually it means that the cache has been flushed or invalidated
89 the CPU cache for the given buffer assuming that it has been already