Lines Matching refs:CPU

12                        CPU and DMA addresses
22 addresses to CPU physical addresses, which are stored as "phys_addr_t" or
31 systems, bus addresses are identical to CPU physical addresses, but in
42                CPU                  CPU                  Bus
54   | CPU |   |       |             | RAM  |             |      |   | Device |
67 from the BAR and converts it to a CPU physical address (B).  The address B
77 cannot because DMA doesn't go through the CPU virtual memory system.
136 (The CPU could write to one word, DMA would write to a different one
317   guarantee that the device and the CPU can access the data
335   The invariant these examples all require is that any CPU store
340              proper memory barriers.  The CPU may reorder stores to
352 	     Also, on some platforms your driver may need to flush CPU write
408 can use to access it from the CPU and dma_handle which you pass to the
411 The CPU virtual address and the DMA address are both
583 Using CPU pointers like this for single mappings has a disadvantage:
586 interfaces deal with page/offset pairs instead of CPU pointers.
658 properly in order for the CPU and device to see the most up-to-date and
673 finish accessing the data with the CPU, and then before actually
725 			 * the DMA transfer with the CPU first
740 				/* CPU should not write to
939    the CPU cache is identical to data in main memory),